Design of DEPFET front-end readout circuit

Name: Design of DEPFET front-end readout circuit
Published: 2026-09-03
License: http://creativecommons.org/licenses/by/4.0

Open this dataset in the live repository

Important usage condition: Use and redistribution are governed by CC BY 4.0. Review and comply with the license before using the data.

Persistent identifier: doi:10.60507/FK2/TJNDMQ
Published version: 1.0
Publication date: 2026-09-03
License: CC BY 4.0

Description

This dataset contains numerical results generated from circuit simulations performed as part of NexGenRE ("Next-Generation Front End Readout Electronics for Particle Physics Experiments"), a Marie Sklodowska-Curie Post-Doctoral Fellowship project focused on developing next-generation readout electronics for precise and reliable data acquisition systems. The simulations investigate performance metrics including transimpedance gain, bandwidth, step response, output noise, power consumption, loop-gain behaviour, detector-capacitance sensitivity, switch timing, and temperature dependence for a differential readout integrated circuit for DEPFET pixel matrices.

Creators

Gogolou, Vasiliki

Keywords

readout, performance metrics, detector matrix, DEPFET, transimpedance amplifier, transimpedance gain, input reffered noise

Files

Before downloading: Use and redistribution are governed by CC BY 4.0. Review and comply with the license before using the data.

File	Type	Bytes	Checksum
AFE_TIA_BW_Cd_sweep.csv	text/csv	358	MD5 9c2daaad225763cab0d8bba99b210c25
AFE_TIA_OUT_step_response.csv	text/csv	859394	MD5 cd64554ea6b9dbc6b378f1f499a00a89
AFE_SDC_GAIN_PVT.csv	text/csv	13105	MD5 940d5c3075b1745cd0df73037d6ba730
simulation_parameters.csv	text/csv	1878	MD5 351d0ad6545e5ef40ac5c8de39bd9ee7
AFE_SDC_before_and_after_ADC_switch.csv	text/csv	2137618	MD5 52476e5181d5f83abf035fcfb79a250b
data_dictionary.csv	text/csv	4540	MD5 8193810fda579a740881fd0d4fc601bd
AFE_TIA_IN.csv	text/csv	948392	MD5 53c067f413a5c324d2bdb552ee11bfea
AFE_TOTAL_PWR_temp.csv	text/csv	414	MD5 43ae57d267dd1a358f03d592f2391053
AFE_TIA_OUT.csv	text/csv	865705	MD5 1746ebbfeda35181e8e5b22468374ce9
AFE_TIA_BW_temp_sweep.csv	text/csv	361	MD5 d87f75b0157e9284871edb7e6a0d6886
AFE_TIA_GAIN_PVT.csv	text/csv	6624	MD5 2411432cbb9a3b6dc93bb7b328ee12ed
AFE_SDC_PSD_OUT.csv	text/csv	2035	MD5 b8764fbbbbbf5d15bff66a84ef429ce4
AFE_TIA_GAIN_temp_sweep.csv	text/csv	357	MD5 5cc16f5c049ed93c55bb1a68382a2d21
AFE_SDC_step_response.csv	text/csv	1034715	MD5 b48560f06c07b18ad9af8a1c102594a0
AFE_SDC_PHASE_PVT.csv	text/csv	13085	MD5 eb20b933266d18eff316c9c650915d7c
AFE_SDC_switch_signals.csv	text/csv	3115098	MD5 8456ebafaa58e59b09a56a5fcb7eb0b1
AFE_TIA_GAIN_IRN_temp_sweep.csv	text/csv	408	MD5 3aa88883255009e2fb82eb4522f3e2dc
AFE_TIA_GAIN_33k_10f.csv	text/csv	5654	MD5 27e044cba6e22cc3a8093d1045bffae3
Gogolou_DEPFET-frontend-readout_Readme.txt	text/plain	6311	MD5 6a87cfc7c112141ab629c3be9f3e208f

Citation

Gogolou, Vasiliki, 2026-09-03, Design of DEPFET front-end readout circuit, doi:10.60507/FK2/TJNDMQ, V1.0

Additional Dataverse fields

Id	824
Dataset Type	dataset
Internal Version Number	22
Latest Version Publishing State	RELEASED
Distribution Date	2026-08-28
Production Date	2026-07-02
Release Time	2026-09-03T08:24:12Z
Create Time	2026-08-28T09:41:48Z
Citation Date	2026-09-03
File Access Request	True

Export metadata

Static metadata exports available for this published dataset version:

Complete Dataverse metadata

Citation Metadata

Title title

Design of DEPFET front-end readout circuit

Author author

Author Name
Gogolou, Vasiliki
Author Affiliation
University of Bonn
Author Identifier Scheme
ORCID
Author Identifier
Type Name
authorIdentifier
Multiple
False
Type Class
primitive
Value
https://orcid.org/0000-0003-3596-4814
Expandedvalue
Person Name
Gogolou, Vasiliki
@id
https://orcid.org/0000-0003-3596-4814
Scheme
ORCID
@type
https://schema.org/Person

Dataset Contact datasetContact

Dataset Contact Name
Gogolou, Vasiliki
Dataset Contact Affiliation
University of Bonn
Dataset Contact Email
vgogolou@uni-bonn.de

Ds Description dsDescription

Ds Description Value
This dataset contains numerical results generated from circuit simulations performed as part of NexGenRE ("Next-Generation Front End Readout Electronics for Particle Physics Experiments"), a Marie Sklodowska-Curie Post-Doctoral Fellowship project focused on developing next-generation readout electronics for precise and reliable data acquisition systems. The simulations investigate performance metrics including transimpedance gain, bandwidth, step response, output noise, power consumption, loop-gain behaviour, detector-capacitance sensitivity, switch timing, and temperature dependence for a differential readout integrated circuit for DEPFET pixel matrices.
Ds Description Date
2026-08-28

Subject subject

Engineering
Physics

Free Keyword freeKeyword

Free Keyword Value
readout
Free Keyword Value
performance metrics
Free Keyword Value
detector matrix
Free Keyword Value
DEPFET
Free Keyword Value
transimpedance amplifier
Free Keyword Value
transimpedance gain
Free Keyword Value
input reffered noise

Language language

English

Production Date productionDate

2026-07-02

Grant Number grantNumber

Grant Number Agency
European Union
Grant Number Value
101209036

Distribution Date distributionDate

2026-08-28

Depositor depositor

Gogolou, Vasiliki

Software software

Software Name
Cadence Virtuoso
Software Version
23.1
Software Name
Cadence Spectre
Software Version
23.1

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