This data set contains all cell data and experimental results from our ICCAD 2026 paper, "Optimal Transistor Level Layout of Single- and Multi-Row Cells for 2nm and Beyond", by Stefan Hougardy, Benjamin Klotz, Malte Schürks, Armin Settels, and Tobias Werner. Below is a description of the files and directories in the root directory. ### `cells.json` Describes which cells are part of the testbed, and how many rows each cell should have. The outermost object key (`ASAP7`, `BONN`) describes the source of the cell. The second level describes the type of cell: `L` is logic, `D` is flip-flops and latches, `C` is related to clocking, and `M` is miscellaneous. The innermost key is the name of the SPICE subcircuit defining the cell. The value describes how many circuit rows the cell should be built with. If an array with multiple elements is given, each of these cell heights should be built. The cell names are constructed by concatenating the keys (separated by `_`) and, if multiple heights are specified, appending `_{height}ROWS`. ### `asap7`, `bonn`, `ns3k` Collections of SPICE netlists for the cells described in `cells.json` ### `base.sp` SPICE file defining FET models for all netlists. For simulation, this needs to be replaced by the model provided as part of the NS3K PDK! The default model is only provided to allow easier conversion of the hierarchical netlists to other, flat formats (e.g. using `listing runnable` in `ngspice`). ### `NS3K-B-CHANGES.patch` A patch file describing the changes between NS3K and NS3K-B. The patch file can be applied to the version of the NS3K PDK that we received from Taigon Song on July 15th 2025. Apply using `patch -p1 < NS3K-B-CHANGES.patch` or similar. ### `results` This directory contains known layouts of the cells. The directory structure inside should follow this structure: `///data`. Each directory should contain at least a `.gds` file with the layout of the corresponding cell, and may contain other files with additional information about the layout.