<resource xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns="http://datacite.org/schema/kernel-4" xsi:schemaLocation="http://datacite.org/schema/kernel-4 http://schema.datacite.org/meta/kernel-4.1/metadata.xsd"><identifier identifierType="DOI">10.60507/FK2/4H9EEH</identifier><creators><creator><creatorName nameType="Personal">Gogolou, Vasiliki</creatorName><givenName>Vasiliki</givenName><familyName>Gogolou</familyName><nameIdentifier SchemeURI="https://orcid.org/" nameIdentifierScheme="ORCID">0000-0003-3596-4814</nameIdentifier><affiliation>University of Bonn</affiliation></creator><creator><creatorName nameType="Personal">Krüger, Hans</creatorName><givenName>Hans</givenName><familyName>Krüger</familyName><nameIdentifier SchemeURI="https://orcid.org/" nameIdentifierScheme="ORCID">0000-0001-8287-3961</nameIdentifier><affiliation>University of Bonn</affiliation></creator><creator><creatorName nameType="Personal">Dingfelder, Jochen</creatorName><givenName>Jochen</givenName><familyName>Dingfelder</familyName><nameIdentifier SchemeURI="https://orcid.org/" nameIdentifierScheme="ORCID">0000-0001-5767-2121</nameIdentifier><affiliation>University of Bonn</affiliation></creator></creators><titles><title>Readout ADC-based chain circuit trade-offs</title></titles><publisher>bonndata</publisher><publicationYear>2026</publicationYear><subjects><subject>Engineering</subject><subject>Physics</subject></subjects><contributors><contributor contributorType="ContactPerson"><contributorName nameType="Personal">Gogolou, Vasiliki</contributorName><givenName>Vasiliki</givenName><familyName>Gogolou</familyName><affiliation>University of Bonn</affiliation></contributor></contributors><dates><date dateType="Created">2026-03-30</date><date dateType="Updated">2026-09-03</date></dates><resourceType resourceTypeGeneral="Dataset"/><relatedIdentifiers><relatedIdentifier relationType="IsSupplementTo" relatedIdentifierType="DOI">10.48565/bonndoc-927</relatedIdentifier></relatedIdentifiers><sizes><size>691</size><size>1827</size><size>1383</size><size>5943</size><size>331</size><size>310</size><size>284</size><size>1217282</size><size>760657</size><size>881356</size><size>793933</size><size>1464</size><size>1324</size></sizes><formats><format>text/csv</format><format>text/csv</format><format>text/csv</format><format>text/plain</format><format>text/csv</format><format>text/csv</format><format>text/csv</format><format>text/csv</format><format>text/csv</format><format>text/csv</format><format>text/csv</format><format>text/csv</format><format>text/csv</format></formats><version>1.0</version><rightsList><rights rightsURI="info:eu-repo/semantics/openAccess"/><rights rightsURI="http://creativecommons.org/licenses/by/4.0">CC BY 4.0</rights></rightsList><descriptions><description descriptionType="Abstract">This dataset contains numerical results generated from circuit simulations performed as part of NexGenRE ("Next-Generation Front End Readout Electronics for Particle Physics Experiments"), a Marie Sklodowska-Curie Post-Doctoral Fellowship project focused on developing next-generation readout electronics for precise and reliable data acquisition systems. The simulated system is a DEPFET readout chain built on a transimpedance amplifier input receiver stage followed by a single ended to differential converter to properly drive the ADC input. The files in this dataset cover loop-gain magnitude and phase, transimpedance gain, trade-off sweeps between input noise and critical design specifications as switching capacitance and power dissipation. Also transient common-mode, differential-mode, input-current, and output-voltage data simulations are included.</description><description descriptionType="TechnicalInfo">Cadence Virtuoso, 23.1</description><description descriptionType="TechnicalInfo">Cadence Spectre, 23.1</description></descriptions><geoLocations/><fundingReferences><fundingReference><funderName>European Union</funderName><awardNumber>101209036</awardNumber></fundingReference></fundingReferences></resource>