Readout ADC-based chain circuit trade-offsdoi:10.60507/FK2/4H9EEHbonndata2026-09-031Gogolou, Vasiliki; Krüger, Hans; Dingfelder, Jochen, 2026, "Readout ADC-based chain circuit trade-offs", https://doi.org/10.60507/FK2/4H9EEH, bonndata, V1Readout ADC-based chain circuit trade-offsdoi:10.60507/FK2/4H9EEHGogolou, VasilikiKrüger, HansDingfelder, Jochen2026-03-30Cadence VirtuosoCadence Spectre101209036bonndataGogolou, VasilikiGogolou, VasilikiEngineeringPhysicsThis dataset contains numerical results generated from circuit simulations performed as part of NexGenRE ("Next-Generation Front End Readout Electronics for Particle Physics Experiments"), a Marie Sklodowska-Curie Post-Doctoral Fellowship project focused on developing next-generation readout electronics for precise and reliable data acquisition systems. The simulated system is a DEPFET readout chain built on a transimpedance amplifier input receiver stage followed by a single ended to differential converter to properly drive the ADC input. The files in this dataset cover loop-gain magnitude and phase, transimpedance gain, trade-off sweeps between input noise and critical design specifications as switching capacitance and power dissipation. Also transient common-mode, differential-mode, input-current, and output-voltage data simulations are included.<a href="http://creativecommons.org/licenses/by/4.0">CC BY 4.0</a>Gogolou, Vasiliki; Krüger, Hans; Dingfelder, Jochen: Front-End Readout Circuit Design for DEPFET Pixel Detectors in 65-nm CMOS. Online-Ausgabe in bonndoc10.48565/bonndoc-927Gogolou, Vasiliki; Krüger, Hans; Dingfelder, Jochen: Front-End Readout Circuit Design for DEPFET Pixel Detectors in 65-nm CMOS. Online-Ausgabe in bonndocGogolou_readout-ADC-trade-offs_Readme.txttext/plainFC_SDC_gain.csvtext/csvFC_SDC_phase.csvtext/csvGBW_TIA.csvtext/csvIN_noise_VS_Cf.csvtext/csvIN_noise_VS_cmf.csvtext/csvIn_noise_VS_pwr.csvtext/csvSDC_cm.csvtext/csvSDC_dm.csvtext/csvTIA_in_curr.csvtext/csvTIA_out.csvtext/csvdata_dictionary.csvtext/csvsimulation_parameters.csvtext/csv