Design of DEPFET front-end readout circuithttps://doi.org/10.60507/FK2/TJNDMQGogolou, Vasilikibonndata2026-09-032026-09-03T08:24:12ZThis dataset contains numerical results generated from circuit simulations performed as part of NexGenRE ("Next-Generation Front End Readout Electronics for Particle Physics Experiments"), a Marie Sklodowska-Curie Post-Doctoral Fellowship project focused on developing next-generation readout electronics for precise and reliable data acquisition systems. The simulations investigate performance metrics including transimpedance gain, bandwidth, step response, output noise, power consumption, loop-gain behaviour, detector-capacitance sensitivity, switch timing, and temperature dependence for a differential readout integrated circuit for DEPFET pixel matrices.EngineeringPhysicsEnglish2026-07-02Gogolou, VasilikiCC BY 4.0